1. Field of the Invention
The present invention relates to a clock generating device, and more particularly, to a clock/data recovery circuit that does not utilize an oscillating device to generate an input reference clock, and a method thereof.
2. Description of the Prior Art
Please refer to FIG. 1. FIG. 1 is a diagram illustrating a clock/data recovery circuit 100 according to the prior art. The clock/data recovery circuit 100 has a frequency input node NFREQ for receiving a reference clock signal FREF to generate an output clock signal FOSC at an output node NOSC, and a data input node Ndata for receiving an input data DD. The clock/data recovery circuit 100 comprises a phase detector 102, a multiplexer 104, a charge pump circuit 106, a low pass filter 108, a voltage controlled oscillator (VCO) 110, a phase/frequency detector 112, a lock detecting circuit 114, and a frequency divider 116. Please note that the connectivity between the components of the clock/data recovery circuit 100 is shown in FIG. 1. Normally, the clock/data recovery circuit 100 can be viewed as a two-loops device, where the first loop consists of the phase/frequency detector 112, the multiplexer 104, the charge pump circuit 106, the low pass filter 108, the voltage controlled oscillator 110, and the frequency divider 116, and the second loop consists of the phase detector 102, the multiplexer 104, the charge pump circuit 106, the low pass filter 108, and the voltage controlled oscillator 110.
The first loop is coupled to the reference clock signal FREF for locking the frequency of the reference clock signal FREF to generate the output clock signal FOSC at a desired output frequency. When the frequency of the reference clock signal FREF is locked on, the oscillating frequency of the voltage controlled oscillator 110 will substantially be equal to the frequency of the input data DD. Then, the first loop will be terminated and the second loop activated at the same time. The second loop is utilized to lock the phase of the input data DD under the oscillating frequency determined by the first loop. Therefore, an oscillating device 118 is necessary for generating the reference clock signal FREF in the prior art clock/data recovery circuit 100. This oscillating device 118, however, increases the manufacturing cost of the clock/data recovery circuit 100.